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Microchip Technology /ATSAME70Q20 /SSC /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXRDY)TXRDY 0 (TXEMPTY)TXEMPTY 0 (RXRDY)RXRDY 0 (OVRUN)OVRUN 0 (CP0)CP0 0 (CP1)CP1 0 (TXSYN)TXSYN 0 (RXSYN)RXSYN

Description

Interrupt Disable Register

Fields

TXRDY

Transmit Ready Interrupt Disable
TXEMPTY

Transmit Empty Interrupt Disable
RXRDY

Receive Ready Interrupt Disable
OVRUN

Receive Overrun Interrupt Disable
CP0

Compare 0 Interrupt Disable
CP1

Compare 1 Interrupt Disable
TXSYN

Tx Sync Interrupt Enable
RXSYN

Rx Sync Interrupt Enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data